Analysis and Implementation of Traffic Buffering in EOS Chip Design-中国期刊网

摘要 Thetrafficbufferingproblemsintheethernetoversynchronousdigitalhierarchy(EOS)areintroducedandanalyzed.Differentsolutionsarealsopresentedindetail.SynchronousDRAM(SDRAM)isusedasoff-chipbuffertostore-and-retransmissionethernetframes.Anewandeasycontroldesignisintroducedhere.Thebufferareasizeonchipisgreatlyreducedandthepowerdissipationislowedatthesametime.

1. The Design and Implementation of CADDS.计算机应用技术,2001-02.
2Tarek Salah Sobh;Mohamed Ibrahiem Amer. FPGA-Based Network Traffic Security： Design and Implementation Using C5.0 Decision Tree Classifier.物理电子学,2013-04.
3GONG Jianya. DESIGN AND IMPLEMENTATION OF AN INTERNET GIS.测绘科学与技术,2001-02.
4Jing Gao;Lili Dai;Xu Gan. Traffic flow and safety analysis.力学,2018-05.
5Xiao-Yu Xia;Wen-Ming Pan;Jia-Chong Kan. Energy Efficient On-Chip Communications Implementation Based on Power Slacks.物理电子学,2014-04.
6朱晓妍;刘宗华;唐明. Detrended Fluctuation Analysis of Traffic Data.物理,2007-07.
7Anna Cristina Barbosa Dias de Carvalho;Elaine Cristina de Sousa Luiz;Antonio Carlos Estender. Design Thinking： Difficulties of Making Its Implementation.教育学,2018-06.
8金志权;柳诚飞;等. Design and Implementation of a Heterogeneous Distributed Database System.计算机科学与技术,1990-04.
9YEN Gar-on. DESIGN AND IMPLEMENTATION OF DYNAMIC SYMBOLS IN DYNAMIC GIS.测绘科学与技术,2001-04.
10Shoji Katagiri Hugang Han. Analysis on Technology Implementation and Economic Growth.国际贸易,2011-08.

Analysis and Implementation of Traffic Buffering in EOS Chip Design

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Analysis and Implementation of Traffic Buffering in EOS Chip Design

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